BS IEC 63011-2:2018 PDF

Integrated circuits. Three dimensional integrated circuits - Alignment of stacked dies having fine pitch interconnect

Open preview (PDF)Integrated circuits. Three dimensional integrated circuits - Alignment of stacked dies having fine pitch interconnect

Title (English):

BS IEC 63011-2:2018

Integrated circuits. Three dimensional integrated circuits - Alignment of stacked dies having fine pitch interconnect

Document status:

Active

Format:

Electronic (PDF)

Publication date:

January 31, 2019

ICS:

31.200

Technical committee:

CENELEC

SKU:

BS IEC 63011-2:2018