Overview
IEC 60191-6-13:2007 is an IEC design guideline for open-top-type sockets used with Fine‑pitch Ball Grid Array (FBGA) and Fine‑pitch Land Grid Array (FLGA) semiconductor packages. It standardizes outline drawings, socket coding, nominal dimensions and recommended mounting patterns for test and burn‑in sockets applied to FBGA/FLGA devices. The publication complements general mechanical package rules in the IEC 60191 series and is intended for designers of test sockets, PCB layout engineers and semiconductor test houses.
Key topics and technical requirements
- Scope and purpose: Defines outline drawings and dimensions for open‑top test/burn‑in sockets for FBGA/FLGA packages.
- Socket code and symbols: Prescribed coding format (e.g., S + package code (FB/FL), socket type symbol such as T for open‑top) and structure for nominal dimension, terminal array count and terminal pitch.
- Nominal dimensions and grouping:
- Applicable package dimensions are covered from about 1.50 mm to 21.0 mm (0.50 mm increments), with limited exceptions for 1.0 mm increments and small packages ≤5.00 mm.
- Sockets are classified into 4 groups; socket outline additions are specified: Group 1 (+36.0 mm), Group 2 (+24.0 mm), Group 3 (+12.0 mm), Group 4 (+8.0 mm) to the nominal dimension (Group 4 allows rectangular outlines).
- Terminal geometry and pitch:
- Standard terminal pitches referenced include e = 0.80, 0.65, 0.50, 0.40 mm.
- Maximum terminal cross‑section diameters (Øb max) are given per pitch (examples shown in the standard).
- Mechanical details:
- Definitions for socket length (L), width (W), seating plane and socket height (A) with maximum values and end‑stroke limits.
- Alignment pin counts, positions and minimum dimensions; recommended positional tolerances and index‑mark area.
- PCB mounting pattern and schematics: Reference symbols, recommended pad/layout dimensions and example mounting patterns to aid PCB designers.
- Registration and outline drawing tables: Overall dimensions, socket dimensions and registration tables (Tables and Figures included in the standard).
Applications and users
- Who uses it: socket manufacturers, semiconductor package and test engineers, PCB layout designers, burn‑in/test service providers, and standards compliance teams.
- Practical uses:
- Designing open‑top FBGA/FLGA test and burn‑in sockets that are mechanically compatible with a range of package sizes.
- Generating standardized socket outline drawings and PCB mounting patterns for reliable contact and mechanical alignment.
- Ensuring interoperability across socket vendors and test equipment.
Related standards
- IEC 60191-2 (Dimensions)
- IEC 60191-6:2004 (General rules for outline drawings of surface‑mounted semiconductor device packages)
For implementation details, tables, figures and precise tolerances consult the full IEC 60191-6-13:2007 document available from the IEC webstore.
Open preview (PDF)Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
