Overview
IEC 61189-3-302:2025 specifies a standardized, non‑destructive test method for the detection of plating defects in unpopulated circuit boards using computed tomography (CT). Applicable to metallized holes (vias and through-holes), the standard defines the CT test principle, required equipment, test steps, image reconstruction and reporting requirements to reliably identify plating voids, fills and related defects.
Key technical topics and requirements
- Test principle: Cone‑beam X‑ray CT acquires multiple angular projections and uses reconstruction software to produce a 3D grayscale representation of the board interior. The minimum detectable defect is three times the device imaging resolution (3× pixel size).
- Equipment:
- X‑ray CT scanner with stable X‑ray source; select smaller focal size for smaller defects. Table examples link source focal size to spatial resolution (e.g., focus size 1 μm → spatial resolution ~0.5 μm).
- Detector system and imaging resolution definition (detector pixel size divided by magnification).
- Mechanical scanning system with minimum displacement steps ≤ 0.01 mm and angular rotation step ≤ 0.01°.
- Shielding facilities and appropriate software for reconstruction and visualization.
- Imaging parameters:
- Radiation penetration rate should exceed 20% (typically 20–70%).
- Parameter setup includes X‑ray source settings, scanning method, field of view, number of frames and scan time to optimize image quality.
- Analysis and reporting:
- 3D reconstruction, visualization, image analysis and data saving.
- Report items: device and sample information, sweep parameters and measurement results.
- Defect identification & statistics: Annexes provide typical images for plating voids, blind‑via filling defects, nodulation, folds and interlayer coincidence, plus void identification and statistical methods (void counts, void/board thickness ratios, filled hole void rate).
Practical applications and users
Who benefits:
- PCB manufacturers and contract electronics assembly (PCBA) houses performing quality control.
- Reliability engineers assessing interconnect integrity.
- Non‑destructive testing (NDT) labs and inspection service providers.
- X‑ray/CT equipment vendors and software developers validating system capabilities.
Typical uses:
- Detecting and quantifying plating voids, incomplete via fills, and internal anomalies without destroying boards.
- Process qualification, failure analysis, incoming inspection and supplier audits.
- Supporting corrective actions in plating and drilling processes by providing statistically robust defect metrics.
Related standards
- ISO 15708-3: Radiation methods for computed tomography - Operation and interpretation (normative reference).
- Other parts of the IEC 61189 series (test methods for electrical materials and printed boards).
Keywords: computed tomography, CT inspection, plating defects, unpopulated circuit boards, metallized holes, non‑destructive testing, X‑ray CT scanner, imaging resolution, void identification.
Open preview (PDF)Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-302: Detection of plating defects in unpopulated circuit boards by computed tomography (CT)
