Overview
IEC 61193-2:2007 is an International Electrotechnical Commission standard in the Quality assessment systems series that specifies zero-acceptance (Ac = 0) sampling plans for inspection by attributes of electronic components, packages and modules. It defines how to form lots, draw representative samples, select sample sizes and apply inspection levels so that manufacturers, customers and third parties can verify product quality while balancing inspection cost and the industry goal of near-zero defects. The standard also provides a method to calculate the Statistical Verified Quality Limit (SVQL) at a 60% confidence level to help verify process control effectiveness.
Key Topics and Requirements
- Scope: Applies to electronic components, electronic packages and modules used in electronic/electric equipment; targets products manufactured under suitable process control.
- Sampling system: Lot formation and identification; samples drawn by simple random sampling or stratified sampling when sub-lots exist.
- Inspection levels: General levels I, II, III (level II default) and special levels S‑1 to S‑4 for smaller sample sizes or destructive/valuable inspections.
- Sample size selection: Table-based mapping of lot sizes and inspection levels (Table 1) and sample-size code letters for tightened/reduced inspection (Table 2).
- Acceptance criteria: Acceptance number (Ac) = 0, rejection number = 1; procedures for tightened or reduced inspection per ISO 2859-1 methods.
- SVQL: Method and tables (Annex A) to estimate statistical verified quality limits in nonconforming items per million at 60% confidence; used to assess supplier process control.
- Terms and definitions: Aligns with IEC 60194, ISO 2859-1 and ISO 3534-2 for consistent terminology (e.g., nonconforming item, structurally similar products).
Applications and Who Uses It
- Manufacturers: final-product inspection, lot release, and periodic verification when aiming for near-zero defects.
- Quality engineers / QA teams: design inspection plans, set inspection levels, and combine process control with sampling to reduce inspection costs.
- Procurement and incoming inspection: acceptance testing of supplier lots, disposition of rejected lots and supplier performance verification.
- Third‑party auditors and test labs: independent lot-by-lot assessments using recognized sampling methodology.
- Use cases: destructive testing scenarios (special levels S‑1..S‑4), accumulation of results for structurally similar products, verifying process improvements using SVQL.
Related Standards
- ISO 2859-1:1999 - Sampling procedures for inspection by attributes (IEC 61193-2 extracts and adapts this approach).
- IEC 60194 - Terms and definitions for printed board design/manufacture/assembly referenced for “module”.
- ISO 3534-2:2006 - Applied statistics vocabulary and symbols used throughout the standard.
Keywords: IEC 61193-2, sampling plans, Ac = 0, zero acceptance, electronic components inspection, SVQL, inspection levels, ISO 2859-1, quality assessment systems.
Open preview (PDF)Quality assessment systems - Part 2: Selection and use of sampling plans for inspection of electronic components and packages
