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IEC 60191-6-5:2001 PDF

Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

First page of standard IEC 60191-6-5:2001Open preview (PDF)Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
Title (English):
IEC 60191-6-5:2001

Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

Document status:
Active
Format:
Electronic (PDF)
Number of pages:
10
Publication date:
August 27, 2001
Edition:
IEC IS 60191 edition 1 version 1
ICS:
31.080.01
Description (English):

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.

Technical details

Technical committee
SC 47D - Semiconductor devices packaging
SKU
IEC 60191-6-5:2001

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